Jump to content

The Principia Machina/TPS/4.5 TMS compliance: Difference between revisions

From The Invariance Itself
Post-TPC-PY page batch (S70): REV6-PATCH
m 1 revision imported
 
(6 intermediate revisions by the same user not shown)
Line 1: Line 1:
{{DISPLAYTITLE:4.5 TMS compliance (TPS 0.3.0)}}
{{DISPLAYTITLE:4.5 TMS compliance (TPS 0.5.0)}}
''Instruction artifact, machine-optimized text: TPS, section 4.5 TMS compliance. Part of [[The Principia Machina/TPS|TPS]] and [[The Principia Machina/Hub|the TPM hub]]. Human-only edit (TPS 5.13). TPS 0.1.0 was declared final at revision 4 on 2026-09-22, a version declaration recorded in the foundations record; the chain begins at TPX's first landing (TPS 5.6.7). TPS 0.1.1, which changed only the status lines, was declared final on 2026-09-26. This page is revision 6 of the tree, declared final as TPS 0.3.0 by H-DECL on 2026-09-28; revision 5, proposed as 0.2.0, stays undeclared and is carried whole.'' The text below is this section of the TPS artifact at 0.3.0, verbatim, its header line still reading "proposed" as the text stood when it was declared; the whole artifact and its file digest are on [[The Principia Machina/TPS]]. Human readers: [[The Principia Machina/TPS/Contents|the contents page]] is the map.
''Instruction artifact, machine-optimized text: TPS, section 4.5 TMS compliance. Part of [[The Principia Machina/TPS|TPS]] and [[The Principia Machina/Hub|the TPM hub]]. Human-only edit (TPS 5.13). TPS 0.1.0 was declared final at revision 4 on 2026-09-22, a version declaration recorded in the foundations record; the chain begins at TPX's first landing (TPS 5.6.7). TPS 0.1.1, which changed only the status lines, was declared final on 2026-09-26, TPS 0.3.0, revision 6, on 2026-09-28, and TPS 0.4.0, revision 7, on 2026-09-30. This page is revision 8 of the tree, declared final as TPS 0.5.0 by H-DECL on 2026-10-03 (naming TPS_0.5.0.txt by its file digest and its D(TPS)); revision 7 is carried whole, and revision 5, proposed as 0.2.0, stays undeclared.'' The text below is this section of the TPS artifact at 0.5.0, verbatim; the whole artifact and its file digest are on [[The Principia Machina/TPS]]. Human readers: [[The Principia Machina/TPS/Contents|the contents page]] is the map.


<pre>
<pre>
Line 6: Line 6:
purpose: SR9 C1-C5 with their classes; the synthetic record suite and
purpose: SR9 C1-C5 with their classes; the synthetic record suite and
         the mechanical implementation, owed
         the mechanical implementation, owed
governs: 4.5 | version: 0.3.0 (proposed) | class: instruction artifact
governs: 4.5 | version: 0.5.0 (proposed) | class: instruction artifact
audience: operator, agent
audience: operator, agent



Latest revision as of 13:23, 7 October 2026

Instruction artifact, machine-optimized text: TPS, section 4.5 TMS compliance. Part of TPS and the TPM hub. Human-only edit (TPS 5.13). TPS 0.1.0 was declared final at revision 4 on 2026-09-22, a version declaration recorded in the foundations record; the chain begins at TPX's first landing (TPS 5.6.7). TPS 0.1.1, which changed only the status lines, was declared final on 2026-09-26, TPS 0.3.0, revision 6, on 2026-09-28, and TPS 0.4.0, revision 7, on 2026-09-30. This page is revision 8 of the tree, declared final as TPS 0.5.0 by H-DECL on 2026-10-03 (naming TPS_0.5.0.txt by its file digest and its D(TPS)); revision 7 is carried whole, and revision 5, proposed as 0.2.0, stays undeclared. The text below is this section of the TPS artifact at 0.5.0, verbatim; the whole artifact and its file digest are on The Principia Machina/TPS. Human readers: the contents page is the map.

TPS 4.5  TMS COMPLIANCE
purpose: SR9 C1-C5 with their classes; the synthetic record suite and
         the mechanical implementation, owed
governs: 4.5 | version: 0.5.0 (proposed) | class: instruction artifact
audience: operator, agent

4.5.1  Every TMS entry passes SR9 C1-C5 at CAC certification, before the
       container's first round of research (see 4.4, 2.4.3). [I-076]
       [I-067]
4.5.2  C1, C2, C4 are MECHANICAL on a synthetic record suite when the
       entry is executable, INSPECTION otherwise; C3, C5 are INSPECTION
       (see 4.2, rows 17 and 18). [I-077]
4.5.3  CAC refuses certification of a TMS that does not declare k (SR3),
       STEP CONVENTION (SR4), N_x (SR6) or S_MAX (2.2.3); an absent
       PROMOTION_FLOOR serializes as F2 and an absent IC2_POLICY as GAP
       (2.4.7), so neither refuses. [I-070] [I-080] [D92.1] [D98.1]
       Built in TPC with vectors in both residences (5.1.5): d(r), the
       SR3, SR5, SR6 and SR8 computations, the C-test harness over the
       synthetic record suite for C1, C2 and C4, and the yardstick
       evaluator over the closed grammar of 2.4.8 (D43.1, D100.1).
       OWED: their execution inside TPX at CAC; kind: computation; C-08.